48.2.5 LPUART Match Address Register (LPUARTx_MATCH)
Address: 4002_A000h base + 10h offset = 4002_A010h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
MA2
0
MA1
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
LPUARTx_MATCH field descriptions
Field Description
31–26
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
25–16
MA2
Match Address 2
The MA1 and MA2 registers are compared to input data addresses when the most significant bit is set and
the associated BAUD[MAEN] bit is set. If a match occurs, the following data is transferred to the data
register. If a match fails, the following data is discarded. Software should only write a MA register when the
associated BAUD[MAEN] bit is clear.
15–10
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
MA1 Match Address 1
The MA1 and MA2 registers are compared to input data addresses when the most significant bit is set and
the associated BAUD[MAEN] bit is set. If a match occurs, the following data is transferred to the data
register. If a match fails, the following data is discarded. Software should only write a MA register when the
associated BAUD[MAEN] bit is clear.
48.2.6 LPUART Modem IrDA Register (LPUARTx_MODIR)
The MODEM register controls options for setting the modem configuration.
Address:
4002_A000h base + 14h offset = 4002_A014h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
IREN TNP
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
TXCTSSRC
TXCTSC
RXRTSE
TXRTSPOL
TXRTSE
TXCTSE
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Register definition
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
1320 NXP Semiconductors
To Next Page
Loading...
