The external clock passes through a synchronizer clocked by the system clock to assure
that counter transitions are properly aligned to system clock transitions.Therefore, to
meet Nyquist criteria considering also jitter, the frequency of the external clock source
must not exceed 1/4 of the system clock frequency.
39.4.2 Prescaler
The selected counter clock source passes through a prescaler that is a 7-bit counter. The
value of the prescaler is selected by the PS[2:0] bits. The following figure shows an
example of the prescaler counter and FTM counter.
FTM counter
0
0
0
0
0
0 0
0 00 0 0
1
1 1
2 2
3 3
1
1
1 1 11 1 1
1
selected input clock
prescaler counter
FTM counting is up.
PS[2:0] = 001
CNTIN = 0x0000
MOD = 0x0003
Figure 39-3. Example of the prescaler counter
39.4.3
Counter
The FTM has a 16-bit counter that is used by the channels either for input or output
modes. The FTM counter clock is the selected clock divided by the prescaler.
The FTM counter has these modes of operation:
• Up counting
• Up-down counting
• Quadrature Decoder mode
39.4.3.1
Up counting
Up counting is selected when:
• QUADEN = 0, and
• CPWMS = 0
Functional description
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
948 NXP Semiconductors
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