LLWU_PE2 field descriptions (continued)
Field Description
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
5–4
WUPE6
Wakeup Pin Enable For LLWU_P6
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
3–2
WUPE5
Wakeup Pin Enable For LLWU_P5
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
WUPE4 Wakeup Pin Enable For LLWU_P4
Enables and configures the edge detection for the wakeup pin.
00 External input pin disabled as wakeup input
01 External input pin enabled with rising edge detection
10 External input pin enabled with falling edge detection
11 External input pin enabled with any change detection
17.3.3 LLWU Pin Enable 3 register (LLWU_PE3)
LLWU_PE3 contains the field to enable and select the edge detect type for the external
wakeup input pins LLWU_P11–LLWU_P8.
NOTE
This register is reset on Chip Reset not VLLS and by reset
types that trigger Chip Reset not VLLS. It is unaffected by reset
types that do not trigger Chip Reset not VLLS. See the
Introduction details for more information.
Address:
4007_C000h base + 2h offset = 4007_C002h
Bit 7 6 5 4 3 2 1 0
Read
WUPE11 WUPE10 WUPE9 WUPE8
Write
Reset
0 0 0 0 0 0 0 0
Chapter 17 Low-Leakage Wakeup Unit (LLWU)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 385