DMA
Controller
Crossbar
switch
Requests
Peripheral
bridge 0
Register
access
Transfers
DMA
Multiplexer
Figure 3-13. DMA Controller configuration
Table 3-20. Reference links to related information
Topic Related module Reference
Full description DMA Controller DMA Controller
System memory map System memory map
Register access Peripheral bridge
(AIPS-Lite 0)
AIPS-Lite 0
Clocking Clock distribution
Power management Power management
Transfers Crossbar switch Crossbar switch
3.3.10 External Watchdog Monitor (EWM) Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
System modules
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
78 NXP Semiconductors
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