SIM_SOPT2 field descriptions (continued)
Field Description
001 Reserved
010 Flash clock
011 LPO clock (1 kHz)
100 MCGIRCLK
101 RTC 32.768kHz clock
110 OSCERCLK0
111 IRC 48 MHz clock
4
RTCCLKOUTSEL
RTC clock out select
Selects either the RTC 1 Hz clock or the 32.768kHz clock to be output on the RTC_CLKOUT pin.
0 RTC 1 Hz clock is output on the RTC_CLKOUT pin.
1 RTC 32.768kHz clock is output on the RTC_CLKOUT pin.
Reserved This field is reserved.
This read-only field is reserved and always has the value 0.
12.2.4 System Options Register 4 (SIM_SOPT4)
Address: 4004_7000h base + 100Ch offset = 4004_800Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
FTM3TRG1SR
C
FTM3TRG0SR
C
FTM0TRG1SR
C
FTM0TRG0SR
C
FTM3CLKSEL
FTM2CLKSEL
FTM1CLKSEL
FTM0CLKSEL
0
FTM2CH1SRC
FTM2CH0SRC
FTM1CH0SRC
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
FTM3FLT0
0
FTM2FLT0
0
FTM1FLT0
0 0
FTM0FLT1
FTM0FLT0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SIM_SOPT4 field descriptions
Field Description
31
FTM3TRG1SRC
FlexTimer 3 Hardware Trigger 1 Source Select
Selects the source of FTM3 hardware trigger 1.
0 Reserved
1 FTM2 channel match drives FTM3 hardware trigger 1
Table continues on the next page...
Memory map and register definition
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
266 NXP Semiconductors