26.10 Low power modes operation
When the MCU enters Stop modes, the OSC is functional depending on CR[ERCLKEN]
and CR[EREFSETN] bit settings. If both these bits are set, the OSC is in operation.
In Low Leakage Stop (LLS) modes, the OSC holds all register settings. If
CR[ERCLKEN] and CR[EREFSTEN] are set before entry to Low Leakage Stop modes,
the OSC is still functional in these modes. After waking up from Very Low Leakage Stop
(VLLSx) modes, all OSC register bits are reset and initialization is required through
software.
26.11
Interrupts
The OSC module does not generate any interrupts.
Low power modes operation
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
588 NXP Semiconductors
To Next Page
Loading...
Need help?
General
