47.4.8 Infrared interface
The UART provides the capability of transmitting narrow pulses to an IR LED and
receiving narrow pulses and transforming them to serial bits, which are sent to the
UART. The IrDA physical layer specification defines a half-duplex infrared
communication link for exchanging data. The full standard includes data rates up to 16
Mbits/s. This design covers data rates only between 2.4 kbits/s and 115.2 kbits/s.
The UART has an infrared transmit encoder and receive decoder. The UART transmits
serial bits of data that are encoded by the infrared submodule to transmit a narrow pulse
for every zero bit. No pulse is transmitted for every one bit. When receiving data, the IR
pulses are detected using an IR photo diode and transformed to CMOS levels by the IR
receive decoder, external from the MCU. The narrow pulses are then stretched by the
infrared receive decoder to get back to a serial bit stream to be received by the UART.
The polarity of transmitted pulses and expected receive pulses can be inverted so that a
direct connection can be made to external IrDA transceiver modules that use active low
pulses.
The infrared submodule receives its clock sources from the UART. One of these two
clocks are selected in the infrared submodule to generate either 3/16, 1/16, 1/32, or 1/4
narrow pulses during transmission.
47.4.8.1
Infrared transmit encoder
The infrared transmit encoder converts serial bits of data from transmit shift register to
the TXD signal. A narrow pulse is transmitted for a zero bit and no pulse for a one bit.
The narrow pulse is sent in the middle of the bit with a duration of 1/32, 1/16, 3/16, or 1/4
of a bit time. A narrow high pulse is transmitted for a zero bit when C3[TXINV] is
cleared, while a narrow low pulse is transmitted for a zero bit when C3[TXINV] is set.
47.4.8.2
Infrared receive decoder
The infrared receive block converts data from the RXD signal to the receive shift register.
A narrow pulse is expected for each zero received and no pulse is expected for each one
received. A narrow high pulse is expected for a zero bit when S2[RXINV] is cleared,
while a narrow low pulse is expected for a zero bit when S2[RXINV] is set. This receive
decoder meets the edge jitter requirement as defined by the IrDA serial infrared physical
layer specification.
Chapter 47 Universal Asynchronous Receiver/Transmitter (UART)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 1291
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