15.4.4 Wait modes
This device contains two different wait modes which are listed here.
• Wait
• Very-Low Power Wait (VLPW)
15.4.4.1 WAIT mode
WAIT mode is entered when the ARM core enters the Sleep-Now or Sleep-On-Exit
modes while SLEEPDEEP is cleared. The ARM CPU enters a low-power state in which
it is not clocked, but peripherals continue to be clocked provided they are enabled.
When an interrupt request occurs, the CPU exits WAIT mode and resumes processing in
RUN mode, beginning with the stacking operations leading to the interrupt service
routine.
A system reset causes an exit from WAIT mode, returning the device to normal RUN
mode.
15.4.4.2
Very-Low-Power Wait (VLPW) mode
VLPW mode is entered by entering the Sleep-Now or Sleep-On-Exit mode while
SLEEPDEEP is cleared and the device is in VLPR mode.
In VLPW, the on-chip voltage regulator remains in its stop regulation state. In this state,
the regulator is designed to supply enough current to the device at a reduced frequency.
To further reduce power in this mode, disable the clocks to unused modules.
VLPR mode restrictions also apply to VLPW.
When an interrupt from VLPW occurs, the device returns to VLPR mode to execute the
interrupt service routine.
A system reset causes an exit from VLPW mode, returning the device to normal RUN
mode.
15.4.5
Stop modes
This device contains a variety of stop modes to meet your application needs.
Functional description
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
366 NXP Semiconductors
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