NXP Semiconductors K22F series User Manual

• Multiplexed 32-bit address and 8-bit data (non-multiplexed 24-bit address and 8-bit
data)
• Non-multiplexed 32-bit address and 32-bit data busses
NOTE
All use cases require signals to actually be available on the pins
of your specific device package. Refer to your specific device's
signal multiplexing table to verify the availability of specific
signals for your device package.
31.4.2
Address comparison
When a bus cycle is routed to FlexBus, FlexBus compares the transfer address to the base
address (see CSAR[BA]) and base address mask (see CSMR[BAM]). This table
describes how FlexBus decides to assert a chip-select and complete the bus cycle based
on the address comparison.
When the transfer address Then FlexBus
Matches one address register
configuration
Asserts the appropriate chip-select, generating a FlexBus bus cycle as defined in the
appropriate CSCR.
If CSMR[WP] is set and a write access is performed, FlexBus terminates the internal
bus cycle with a bus error, does not assert a chip-select, and does not perform an
external bus cycle.
Does not match an address register
configuration
Terminates the transfer with a bus error response, does not assert a chip-select, and
does not perform a FlexBus cycle.
Matches more than one address
register configuration
Terminates the transfer with a bus error response, does not assert a chip-select, and
does not perform a FlexBus cycle.
31.4.3 Address driven on address bus
FlexBus always drives a 32-bit address on the FB_AD bus regardless of the external
memory's or peripheral's address size.
31.4.4
Connecting address/data lines
The external device must connect its address and data lines as follows:
• Address lines
• FB_AD from FB_AD0 upward
• Data lines
Functional description
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
704 NXP Semiconductors

NXP Semiconductors K22F series Specifications

General

Brand	NXP Semiconductors
Model	K22F series
Category	Controller
Language	English