FTMx_POL field descriptions (continued)
Field Description
0 The channel polarity is active high.
1 The channel polarity is active low.
0
POL0
Channel 0 Polarity
Defines the polarity of the channel output.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0 The channel polarity is active high.
1 The channel polarity is active low.
39.3.18 Fault Mode Status (FTMx_FMS)
This register contains the fault detection flags, write protection enable bit, and the logic
OR of the enabled fault inputs.
Address:
Base address + 74h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
FAULTF
WPEN
FAULTIN
0
FAULTF3
FAULTF2
FAULTF1
FAULTF0
W
0
0 0 0 0
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Chapter 39 FlexTimer Module (FTM)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 929