NXP Semiconductors K22F series - ADC Minus-Side General Calibration Value Register (Adcx_Clm2); ADC Minus-Side General Calibration Value Register (Adcx_Clm1)

34.3.22 ADC Minus-Side General Calibration Value Register
(ADCx_CLM2)
For more information, see CLMD register description.
Address: Base address + 64h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CLM2
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
ADCx_CLM2 field descriptions
Field Description
31–8
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
CLM2 Calibration Value
Calibration Value
34.3.23 ADC Minus-Side General Calibration Value Register
(ADCx_CLM1)
For more information, see CLMD register description.
Address:
Base address + 68h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CLM1
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0
ADCx_CLM1 field descriptions
Field Description
31–7
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
CLM1 Calibration Value
Calibration Value
Memory map and register definitions
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
788 NXP Semiconductors