NXP Semiconductors K22F series - PUSH TX FIFO Register in Slave Mode (Spix_Pushr_Slave); POP RX FIFO Register (Spix_Popr)

45.3.8 PUSH TX FIFO Register In Slave Mode (SPIx_PUSHR_SLAVE)
Specifies data to be transferred to the TX FIFO in slave mode. An 8- or 16-bit write
access to PUSHR transfers the 16-bit TXDATA field to the TX FIFO.
Address: Base address + 34h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Reserved TXDATA
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SPIx_PUSHR_SLAVE field descriptions
Field Description
31–16
Reserved
This field is reserved.
TXDATA Transmit Data
Holds SPI data to be transferred according to the associated SPI command.
45.3.9 POP RX FIFO Register (SPIx_POPR)
POPR is used to read the RX FIFO. Eight- or sixteen-bit read accesses to the POPR have
the same effect on the RX FIFO as 32-bit read accesses. A write to this register will
generate a Transfer Error.
Address:
Base address + 38h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
RXDATA
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SPIx_POPR field descriptions
Field Description
RXDATA Received Data
Contains the SPI data from the RX FIFO entry to which the Pop Next Data Pointer points.
Chapter 45 Serial Peripheral Interface (SPI)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 1149