NXP Semiconductors K22F series - Page 1148

SPIx_PUSHR field descriptions
Field Description
31
CONT
Continuous Peripheral Chip Select Enable
Selects a continuous selection format. The bit is used in SPI Master mode. The bit enables the selected
PCS signals to remain asserted between transfers.
0 Return PCSn signals to their inactive state between transfers.
1 Keep PCSn signals asserted between transfers.
30–28
CTAS
Clock and Transfer Attributes Select
Selects which CTAR to use in master mode to specify the transfer attributes for the associated SPI frame.
In SPI Slave mode, CTAR0 is used.See the chip specific section for details to determine how many
CTARs this device has. You should not program a value in this field for a register that is not present.
000 CTAR0
001 CTAR1
010 Reserved
011 Reserved
100 Reserved
101 Reserved
110 Reserved
111 Reserved
27
EOQ
End Of Queue
Host software uses this bit to signal to the module that the current SPI transfer is the last in a queue. At
the end of the transfer, the EOQF bit in the SR is set.
0 The SPI data is not the last data to transfer.
1 The SPI data is the last data to transfer.
26
CTCNT
Clear Transfer Counter
Clears the TCNT field in the TCR register. The TCNT field is cleared before the module starts transmitting
the current SPI frame.
0 Do not clear the TCR[TCNT] field.
1 Clear the TCR[TCNT] field.
25–24
Reserved
Always write the reset value to this field.
This field is reserved.
23–22
Reserved
Always write the reset value to this field.
This field is reserved.
21–16
PCS
Select which PCS signals are to be asserted for the transfer. Refer to the chip-specific SPI information for
the number of PCS signals used in this chip.
0 Negate the PCS[x] signal.
1 Assert the PCS[x] signal.
TXDATA Transmit Data
Holds SPI data to be transferred according to the associated SPI command.
Memory Map/Register Definition
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
1148 NXP Semiconductors