FB_CSCRn field descriptions (continued)
Field Description
3
BSTW
Burst-Write Enable
Specifies whether burst writes are enabled for memory associated with each chip select.
0 Disabled. Data exceeding the specified port size is broken into individual, port-sized, non-burst writes.
For example, a 32-bit write to an 8-bit port takes four byte writes.
1 Enabled. Enables burst write of data larger than the specified port size, including 32-bit writes to 8-
and 16-bit ports, 16-bit writes to 8-bit ports, and line writes to 8-, 16-, and 32-bit ports.
Reserved This field is reserved.
This read-only field is reserved and always has the value 0.
31.3.4 Chip Select port Multiplexing Control Register (FB_CSPMCR)
Controls the multiplexing of the FlexBus signals.
NOTE
A bus error occurs when you do any of the following:
• Write to a reserved address
• Write to a reserved field in this register, or
• Access this register using a size other than 32 bits.
Address:
4000_C000h base + 60h offset = 4000_C060h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
GROUP1 GROUP2 GROUP3 GROUP4 GROUP5
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FB_CSPMCR field descriptions
Field Description
31–28
GROUP1
FlexBus Signal Group 1 Multiplex control
Controls the multiplexing of the FB_ALE, FB_CS1 , and FB_TS signals.
0000 FB_ALE
0001 FB_CS1
0010 FB_TS
Any other value Reserved
27–24
GROUP2
FlexBus Signal Group 2 Multiplex control
Controls the multiplexing of the FB_CS4, FB_TSIZ0, and FB_BE_31_24 signals.
0000 FB_CS4
0001 FB_TSIZ0
0010 FB_BE_31_24
Any other value Reserved
Table continues on the next page...
Memory Map/Register Definition
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
702 NXP Semiconductors