CJTAG
DAP Bus
TDO
TRACESWO
TDO
TDI
TCK
TDI
nSYS_TRST
nSYS_TDO
nSYS_TDI
nSYS_TCK
nSYS_TMS
nTRST
TCK
TMS_OUT
TMS_IN
TMS_OUT_OE
TMS
TDO
TDI
SWCLKTCK
SWDITMS
SWDO
SWDOEN
SWD/ JTAG
SELECT
SWCLKTCK
SWDITMS
JTAGSEL
SWDSEL
4’b1111 or 4’b0000
TDI TDO PEN
JTAGNSW
JTAGC
TDO
TDI
nTRST
TCK
TMS
jtag_updateinstr[3:0]
4’b1111 or 4’b1110
JTAGir[3:0]
IR==BYPASS or IDCODE
IR==BYPASS or IDCODE
A
A
(1’b0 = 2-pin cJTAG)
(1’b1 = 4-pin JTAG)
To Test
Resources
1’b1
MDM-AP
AHB-AP
Figure 9-2. Modified Debug Port
The debug port comes out of reset in standard JTAG mode and is switched into either
cJTAG or SWD mode by the following sequences. Once the mode has been changed,
unused debug pins can be reassigned to any of their alternative muxed functions.
9.2.1
JTAG-to-SWD change sequence
1. Send more than 50 TCK cycles with TMS (SWDIO) =1
2. Send the 16-bit sequence on TMS (SWDIO) = 0111_1001_1110_0111 (MSB
transmitted first)
3. Send more than 50 TCK cycles with TMS (SWDIO) =1
NOTE
See the ARM documentation for the CoreSight DAP Lite for
restrictions.
9.2.2
JTAG-to-cJTAG change sequence
1. Reset the debug port
The Debug Port
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
202 NXP Semiconductors
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