Table 31-1. FlexBus signal descriptions (continued)
Signal I/O Function
If auto-acknowledge is disabled (CSCR[AA] = 0), the external memory or peripheral
drives FB_TA to terminate the transfer. If auto-acknowledge is enabled (CSCR[AA] =
1), FB_TA is generated internally after a specified number of wait states, or the external
memory or peripheral may assert external FB_TA before the wait-state countdown to
terminate the transfer early. The chip deasserts FB_CS one cycle after the last FB_TA
is asserted. During read transfers, the external memory or peripheral must continue to
drive data until FB_TA is recognized. For write transfers, the chip continues driving
data one clock cycle after FB_CS is deasserted.
The number of wait states is determined by CSCR or the external FB_TA input. If the
external FB_TA is used, the external memory or peripheral has complete control of the
number of wait states.
Note:
External memory or peripherals should assert FB_TA only while the FB_CS
signal to the external memory or peripheral is asserted.
The CSPMCR register controls muxing of FB_TA with other signals. When the
CSPMCR register does not allow fb_ta control, auto-acknowledge must be used
(CSCR[AA] =1'b1); otherwise the bus may hang.
FB_CLK O FlexBus Clock Output
31.3 Memory Map/Register Definition
The following tables describe the registers and bit meanings for configuring chip-select
operation.
The actual number of chip selects available depends upon the device and its pin
configuration. If the device does not support certain chip select signals or the pin is not
configured for a chip-select function, then that corresponding set of chip-select registers
has no effect on an external pin.
Note
You must set CSMR0[V] before the chip select registers take
effect.
A bus error occurs when writing to reserved register locations.
FB memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4000_C000 Chip Select Address Register (FB_CSAR0) 32 R/W 0000_0000h 31.3.1/697
4000_C004 Chip Select Mask Register (FB_CSMR0) 32 R/W 0000_0000h 31.3.2/698
Table continues on the next page...
Memory Map/Register Definition
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
696 NXP Semiconductors
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