Address: 4007_D000h base + 1h offset = 4007_D001h
Bit 7 6 5 4 3 2 1 0
Read LVWF 0
LVWIE
0
LVWV
Write LVWACK
Reset
0 0 0 0 0 0 0 0
PMC_LVDSC2 field descriptions
Field Description
7
LVWF
Low-Voltage Warning Flag
This read-only status field indicates a low-voltage warning event. LVWF is set when V
Supply
transitions
below the trip point, or after reset and V
Supply
is already below V
LVW
. LVWF may be 1 after power-on reset,
therefore, to use LVW interrupt function, before enabling LVWIE, LVWF must be cleared by writing
LVWACK first.
0 Low-voltage warning event not detected
1 Low-voltage warning event detected
6
LVWACK
Low-Voltage Warning Acknowledge
This write-only field is used to acknowledge low voltage warning errors. Write 1 to clear LVWF. Reads
always return 0.
5
LVWIE
Low-Voltage Warning Interrupt Enable
Enables hardware interrupt requests for LVWF.
0 Hardware interrupt disabled (use polling)
1 Request a hardware interrupt when LVWF = 1
4–2
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
LVWV Low-Voltage Warning Voltage Select
Selects the LVW trip point voltage (V
LVW
). The actual voltage for the warning depends on LVDSC1[LVDV].
00 Low trip point selected (V
LVW
= V
LVW1
)
01 Mid 1 trip point selected (V
LVW
= V
LVW2
)
10 Mid 2 trip point selected (V
LVW
= V
LVW3
)
11 High trip point selected (V
LVW
= V
LVW4
)
16.5.3 Regulator Status And Control register (PMC_REGSC)
The PMC contains an internal voltage regulator. The voltage regulator design uses a
bandgap reference that is also available through a buffer as input to certain internal
peripherals, such as the CMP and ADC. The internal regulator provides a status bit
(REGONS) indicating the regulator is in run regulation.
Memory map and register descriptions
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
376 NXP Semiconductors
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