NXP Semiconductors K22F series - Edge-Aligned PWM (EPWM) Mode

TOF bit
...
...
0
1 1 1
2
2
3 3
4 45 5
0 0
previous value
previous value
channel (n) output
counter
overflow
counter
overflow
counter
overflow
channel (n)
match
channel (n)
match
CNT
MOD = 0x0005
CnV = 0x0003
CHnF bit
Figure 39-16. Example of the Output Compare mode when the match toggles the
channel output
TOF bit
...
...
0
1 1 1
2
2
3 3
4 45 5
0 0
previous value
previous value
channel (n) output
counter
overflow
counter
overflow
counter
overflow
channel (n)
match
channel (n)
match
CNT
MOD = 0x0005
CnV = 0x0003
CHnF bit
Figure 39-17. Example of the Output Compare mode when the match clears the channel
output
channel (n) output
CHnF bit
TOF bit
CNT
MOD = 0x0005
CnV = 0x0003
counter
overflow
channel (n)
match
counter
overflow
channel (n)
match
counter
overflow
...
0
1
2
3 4 5
0
1
2
3
4
5
0
1
...
previous value
previous value
Figure 39-18. Example of the Output Compare mode when the match sets the channel
output
If (ELSnB:ELSnA = 0:0) when the counter reaches the value in the CnV register, the
CHnF bit is set and the channel (n) interrupt is generated if CHnIE = 1, however the
channel (n) output is not modified and controlled by FTM.
39.4.6
Edge-Aligned PWM (EPWM) mode
The Edge-Aligned mode is selected when:
• QUADEN = 0
Chapter 39 FlexTimer Module (FTM)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 959