NXP Semiconductors K22F series - Chip Select Control Register (Fb_Cscrn)

FB_CSMRn field descriptions (continued)
Field Description
NOTE:
At reset, FB_CS0 will fire for any access to the FlexBus memory region. CSMR0[V] must be set
as part of the chip select initialization sequence to allow other chip selects to function as
programmed.
0 Chip-select is invalid.
1 Chip-select is valid.
31.3.3 Chip Select Control Register (FB_CSCRn)
Controls the auto-acknowledge, address setup and hold times, port size, burst capability,
and number of wait states for the associated chip select.
NOTE
To support the global chip-select (FB_CS0), the CSCR0 reset
values differ from the other CSCRs. The reset value of CSCR0
is as follows:
• Bits 31–24 are 0b
• Bit 23–3 are chip-dependent
• Bits 3–0 are 0b
See the chip configuration details for your particular chip for
information on the exact CSCR0 reset value.
Address:
4000_C000h base + 8h offset + (12d × i), where i=0d to 5d
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
SWS
0
SWSEN
EXTS ASET RDAH WRAH
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
WS BLS AA PS BEM BSTR
BSTW
0
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
Chapter 31 External Bus Interface (FlexBus)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 699