6.3.3 FOPT boot options
The flash option register (FOPT) in the flash memory module allows the user to
customize the operation of the MCU at boot time. The register contains read-only bits
that are loaded from the NVM's option byte in the flash configuration field. The user can
reprogram the option byte in flash to change the FOPT values that are used for
subsequent resets. For more details on programming the option byte, refer to the flash
memory chapter.
The MCU uses the FOPT register bits to configure the device at reset as shown in the
following table.
NOTE
Reserved bits in the option byte should be left in their default
erased state of logic 1. FOPT[7:0] = 0x00 is not a valid
configuration. FOPT register is written to 0xFF if the contents
of NVM's option byte in the flash configuration field is 0x00.
Table 6-3. Flash Option Register Bit Definitions
Bit
Num
Field Value Definition
7-6 Reserved Reserved for future expansion.
5 FAST_INIT Select initialization speed on POR, VLLSx, and any system reset.
0 Slower initialization. The Flash initialization will be slower with the benefit of
reduced average current during this time. The duration of the recovery will be
controlled by the clock divider selection determined by the LPBOOT setting.
1 Fast Initialization.The Flash has faster recoveries at the expense of higher current
during these times.
4-3 Reserved Reserved for future expansion.
2 NMI_DIS Enable/disable control for the NMI function.
0 NMI interrupts are always blocked. The associated pin continues to default to NMI
pin controls with internal pullup enabled.
1 NMI pin/interrupts reset default to enabled.
1 EZPORT_DIS Enable/disable EzPort function.
0 EzPort operation is disabled. The device always boots to normal CPU execution
and the state of EZP_CS signal during reset is ignored. This option avoids
inadvertent resets into EzPort mode if the EZP_CS/NMI pin is used for its NMI
function.
1 EzPort operation is enabled. The state of EZP_CS pin during reset determines if
device enters EzPort mode.
0 LPBOOT Control the reset value of OUTDIVx values in SIM_CLKDIV1 register. Larger divide value
selections produce lower average power consumption during POR, VLLSx recoveries and
reset sequencing and after reset exit. The recovery times are also extended if the
FAST_INIT option is not selected.
Table continues on the next page...
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K22F Sub-Family Reference Manual, Rev. 4, 08/2016
178 NXP Semiconductors