• Slave mode
• Module Disable mode
• Chip-specific modes:
• External Stop mode
• Debug mode
The module enters module-specific modes when the host writes a module register. The
chip-specific modes are controlled by signals external to the module. The chip-specific
modes are modes that a chip may enter in parallel to the block-specific modes.
45.1.4.1 Master Mode
Master mode allows the module to initiate and control serial communication. In this
mode, these signals are controlled by the module and configured as outputs:
• SCK
• SOUT
•
PCS[x]
45.1.4.2
Slave Mode
Slave mode allows the module to communicate with SPI bus masters. In this mode, the
module responds to externally controlled serial transfers. The SCK signal and the
PCS[0]/SS signals are configured as inputs and driven by an SPI bus master.
45.1.4.3
Module Disable Mode
The Module Disable mode can be used for chip power management. The clock to the
non-memory mapped logic in the module can be stopped while in the Module Disable
mode.
Chapter 45 Serial Peripheral Interface (SPI)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 1127