NXP Semiconductors K22F series - Page 1131

SPI memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4002_C07C Receive FIFO Registers (SPI0_RXFR0) 32 R 0000_0000h
45.3.11/
1150
4002_C080 Receive FIFO Registers (SPI0_RXFR1) 32 R 0000_0000h
45.3.11/
1150
4002_C084 Receive FIFO Registers (SPI0_RXFR2) 32 R 0000_0000h
45.3.11/
1150
4002_C088 Receive FIFO Registers (SPI0_RXFR3) 32 R 0000_0000h
45.3.11/
1150
4002_D000 Module Configuration Register (SPI1_MCR) 32 R/W 0000_4001h 45.3.1/1132
4002_D008 Transfer Count Register (SPI1_TCR) 32 R/W 0000_0000h 45.3.2/1135
4002_D00C
Clock and Transfer Attributes Register (In Master Mode)
(SPI1_CTAR0)
32 R/W 7800_0000h 45.3.3/1136
4002_D00C
Clock and Transfer Attributes Register (In Slave Mode)
(SPI1_CTAR0_SLAVE)
32 R/W 7800_0000h 45.3.4/1140
4002_D010
Clock and Transfer Attributes Register (In Master Mode)
(SPI1_CTAR1)
32 R/W 7800_0000h 45.3.3/1136
4002_D02C Status Register (SPI1_SR) 32 R/W 0200_0000h 45.3.5/1142
4002_D030
DMA/Interrupt Request Select and Enable Register
(SPI1_RSER)
32 R/W 0000_0000h 45.3.6/1145
4002_D034 PUSH TX FIFO Register In Master Mode (SPI1_PUSHR) 32 R/W 0000_0000h 45.3.7/1147
4002_D034
PUSH TX FIFO Register In Slave Mode
(SPI1_PUSHR_SLAVE)
32 R/W 0000_0000h 45.3.8/1149
4002_D038 POP RX FIFO Register (SPI1_POPR) 32 R 0000_0000h 45.3.9/1149
4002_D03C Transmit FIFO Registers (SPI1_TXFR0) 32 R 0000_0000h
45.3.10/
1150
4002_D040 Transmit FIFO Registers (SPI1_TXFR1) 32 R 0000_0000h
45.3.10/
1150
4002_D044 Transmit FIFO Registers (SPI1_TXFR2) 32 R 0000_0000h
45.3.10/
1150
4002_D048 Transmit FIFO Registers (SPI1_TXFR3) 32 R 0000_0000h
45.3.10/
1150
4002_D07C Receive FIFO Registers (SPI1_RXFR0) 32 R 0000_0000h
45.3.11/
1150
4002_D080 Receive FIFO Registers (SPI1_RXFR1) 32 R 0000_0000h
45.3.11/
1150
4002_D084 Receive FIFO Registers (SPI1_RXFR2) 32 R 0000_0000h
45.3.11/
1150
4002_D088 Receive FIFO Registers (SPI1_RXFR3) 32 R 0000_0000h
45.3.11/
1150
Chapter 45 Serial Peripheral Interface (SPI)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 1131