LPUART_STAT[RDRF] flag and generates an interrupt if enabled. When
LPUART_STAT[RWUID] is one, any idle condition sets the LPUART_STAT[IDLE]
flag and generates an interrupt if enabled, regardless of whether LPUART_CTRL[RWU]
is zero or one.
The idle-line type (LPUART_CTRL[ILT]) control bit selects one of two ways to detect
an idle line. When LPUART_CTRL[ILT] is cleared, the idle bit counter starts after the
start bit so the stop bit and any logic 1s at the end of a character count toward the full
character time of idle. When LPUART_CTRL[ILT] is set, the idle bit counter does not
start until after the stop bit time, so the idle detection is not affected by the data in the last
character of the previous message.
48.3.3.2.2 Address-mark wakeup
When LPUART_CTRL[WAKE] is set, the receiver is configured for address-mark
wakeup. In this mode, LPUART_CTRL[RWU] is cleared automatically when the
receiver detects a logic 1 in the most significant bit of a received character.
Address-mark wakeup allows messages to contain idle characters, but requires the MSB
be reserved for use in address frames. The logic 1 in the MSB of an address frame clears
the LPUART_CTRL[RWU] bit before the stop bits are received and sets the
LPUART_STAT[RDRF] flag. In this case, the character with the MSB set is received
even though the receiver was sleeping during most of this character time.
48.3.3.2.3
Data match wakeup
When LPUART_CTRL[RWU] is set and LPUART_BAUD[MATCFG] equals 11, the
receiver is configured for data match wakeup. In this mode, LPUART_CTRL[RWU] is
cleared automatically when the receiver detects a character that matches MATCH[MA1]
field when BAUD[MAEN1] is set, or that matches MATCH[MA2] when
BAUD[MAEN2] is set.
48.3.3.2.4
Address Match operation
Address match operation is enabled when the LPUART_BAUD[MAEN1] or
LPUART_BAUD[MAEN2] bit is set and LPUART_BAUD[MATCFG] is equal to 00. In
this function, a character received by the LPUART_RX pin with a logic 1 in the bit
position immediately preceding the stop bit is considered an address and is compared
with the associated MATCH[MA1] or MATCH[MA2] field. The character is only
transferred to the receive buffer, and LPUART_STAT[RDRF] is set, if the comparison
matches. All subsequent characters received with a logic 0 in the bit position immediately
preceding the stop bit are considered to be data associated with the address and are
transferred to the receive data buffer. If no marked address match occurs then no transfer
Chapter 48 Low Power Universal Asynchronous Receiver/Transmitter (LPUART)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 1329
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