NXP Semiconductors K22F series - Page 19

Section number Title Page
24.7 Memory map and register definition.............................................................................................................................528
24.7.1 Watchdog Status and Control Register High (WDOG_STCTRLH)........................................................... 529
24.7.2 Watchdog Status and Control Register Low (WDOG_STCTRLL)............................................................ 531
24.7.3 Watchdog Time-out Value Register High (WDOG_TOVALH).................................................................531
24.7.4 Watchdog Time-out Value Register Low (WDOG_TOVALL)..................................................................532
24.7.5 Watchdog Window Register High (WDOG_WINH).................................................................................. 532
24.7.6 Watchdog Window Register Low (WDOG_WINL)................................................................................... 533
24.7.7 Watchdog Refresh register (WDOG_REFRESH)....................................................................................... 533
24.7.8 Watchdog Unlock register (WDOG_UNLOCK).........................................................................................533
24.7.9 Watchdog Timer Output Register High (WDOG_TMROUTH)................................................................. 534
24.7.10 Watchdog Timer Output Register Low (WDOG_TMROUTL).................................................................. 534
24.7.11 Watchdog Reset Count register (WDOG_RSTCNT).................................................................................. 535
24.7.12 Watchdog Prescaler register (WDOG_PRESC).......................................................................................... 535
24.8 Watchdog operation with 8-bit access.......................................................................................................................... 535
24.8.1 General guideline......................................................................................................................................... 535
24.8.2 Refresh and unlock operations with 8-bit access.........................................................................................536
24.9 Restrictions on watchdog operation..............................................................................................................................537
Chapter 25
Multipurpose Clock Generator (MCG)
25.1 Introduction...................................................................................................................................................................539
25.1.1 Features........................................................................................................................................................ 539
25.1.2 Modes of Operation..................................................................................................................................... 543
25.2 External Signal Description.......................................................................................................................................... 543
25.3 Memory Map/Register Definition.................................................................................................................................543
25.3.1 MCG Control 1 Register (MCG_C1)...........................................................................................................544
25.3.2 MCG Control 2 Register (MCG_C2)...........................................................................................................545
25.3.3 MCG Control 3 Register (MCG_C3)...........................................................................................................546
25.3.4 MCG Control 4 Register (MCG_C4)...........................................................................................................547
25.3.5 MCG Control 5 Register (MCG_C5)...........................................................................................................548
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 19