64
MAP
BGA
64
LQFP
80
WLC
SP
88
QFN
100
LQFP
121
MAP
BGA
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EZPORT
A1 1 E7 1 1 E4 PTE0/
CLKOUT3
2K
ADC1_
SE4a
ADC1_
SE4a
PTE0/
CLKOUT3
2K
SPI1_
PCS1
UART1_
TX
I2C1_SDA RTC_
CLKOUT
B1 2 A8 2 2 E3 PTE1/
LLWU_P0
ADC1_
SE5a
ADC1_
SE5a
PTE1/
LLWU_P0
SPI1_
SOUT
UART1_
RX
I2C1_SCL SPI1_SIN
— — A9 3 3 E2 PTE2/
LLWU_P1
ADC1_
SE6a
ADC1_
SE6a
PTE2/
LLWU_P1
SPI1_SCK UART1_
CTS_b
— — A10 4 4 F4 PTE3 ADC1_
SE7a
ADC1_
SE7a
PTE3 SPI1_SIN UART1_
RTS_b
SPI1_
SOUT
— — B8 5 5 H7 PTE4/
LLWU_P2
DISABLE
D
PTE4/
LLWU_P2
SPI1_
PCS0
LPUART0
_TX
— — C8 6 6 G4 PTE5 DISABLE
D
PTE5 SPI1_
PCS2
LPUART0
_RX
FTM3_
CH0
— — — 7 7 F3 PTE6 DISABLE
D
PTE6 SPI1_
PCS3
LPUART0
_CTS_b
I2S0_
MCLK
FTM3_
CH1
USB_
SOF_OUT
C5 3 B9 8 8 E6 VDD VDD VDD
C4 4 B10 9 9 G7 VSS VSS VSS
— — D8 9 — L6 VSS VSS VSS
E1 5 C10 10 10 F1 USB0_DP USB0_DP USB0_DP
D1 6 D10 11 11 F2 USB0_DM USB0_DM USB0_DM
E2 7 C9 12 12 G1 VOUT33 VOUT33 VOUT33
D2 8 D9 13 13 G2 VREGIN VREGIN VREGIN
— — — — 14 H1 ADC0_
DP1
ADC0_
DP1
ADC0_
DP1
— — — — 15 H2 ADC0_
DM1
ADC0_
DM1
ADC0_
DM1
— — E10 14 16 J1 ADC1_
DP1/
ADC0_
DP2
ADC1_
DP1/
ADC0_
DP2
ADC1_
DP1/
ADC0_
DP2
— — F10 15 17 J2 ADC1_
DM1/
ADC0_
DM2
ADC1_
DM1/
ADC0_
DM2
ADC1_
DM1/
ADC0_
DM2
G1 9 E9 16 18 K1 ADC0_
DP0/
ADC1_
DP3
ADC0_
DP0/
ADC1_
DP3
ADC0_
DP0/
ADC1_
DP3
F1 10 F9 17 19 K2 ADC0_
DM0/
ADC1_
DM3
ADC0_
DM0/
ADC1_
DM3
ADC0_
DM0/
ADC1_
DM3
G2 11 — — 20 L1 ADC1_
DP0/
ADC0_
DP3
ADC1_
DP0/
ADC0_
DP3
ADC1_
DP0/
ADC0_
DP3
Pinout
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
216 NXP Semiconductors