NXP Semiconductors K22F series - Page 250

PORTx_PCRn field descriptions (continued)
Field Description
1000 Alternative 8 (chip-specific).
1001 Alternative 9 (chip-specific).
1010 Alternative 10 (chip-specific).
1011 Alternative 11 (chip-specific).
1100 Alternative 12 (chip-specific).
1101 Alternative 13 (chip-specific).
1110 Alternative 14 (chip-specific).
1111 Alternative 15 (chip-specific).
7
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
6
DSE
Drive Strength Enable
Drive strength configuration is valid in all digital pin muxing modes.
0 Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.
1 High drive strength is configured on the corresponding pin, if pin is configured as a digital output.
5
ODE
Open Drain Enable
Open drain configuration is valid in all digital pin muxing modes.
0 Open drain output is disabled on the corresponding pin.
1 Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output.
4
PFE
Passive Filter Enable
Passive filter configuration is valid in all digital pin muxing modes.
0 Passive input filter is disabled on the corresponding pin.
1 Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer
to the device data sheet for filter characteristics.
3
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
2
SRE
Slew Rate Enable
Slew rate configuration is valid in all digital pin muxing modes.
0 Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.
1 Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.
1
PE
Pull Enable
Pull configuration is valid in all digital pin muxing modes.
0 Internal pullup or pulldown resistor is not enabled on the corresponding pin.
1 Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a
digital input.
0
PS
Pull Select
Pull configuration is valid in all digital pin muxing modes.
0 Internal pulldown resistor is enabled on the corresponding pin, if the corresponding PE field is set.
1 Internal pullup resistor is enabled on the corresponding pin, if the corresponding PE field is set.
Memory map and register definition
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
250 NXP Semiconductors