NXP Semiconductors K22F series - Page 43

Section number Title Page
47.8.10 Legacy and reverse compatibility considerations........................................................................................ 1301
Chapter 48
Low Power Universal Asynchronous Receiver/Transmitter (LPUART)
48.1 Introduction...................................................................................................................................................................1303
48.1.1 Features........................................................................................................................................................ 1303
48.1.2 Modes of operation...................................................................................................................................... 1304
48.1.3 Signal Descriptions...................................................................................................................................... 1304
48.1.4 Block diagram..............................................................................................................................................1305
48.2 Register definition.........................................................................................................................................................1306
48.2.1
LPUART Baud Rate Register (LPUARTx_BAUD)....................................................................................1307
48.2.2
LPUART Status Register (LPUARTx_STAT)............................................................................................1309
48.2.3
LPUART Control Register (LPUARTx_CTRL)......................................................................................... 1313
48.2.4
LPUART Data Register (LPUARTx_DATA)............................................................................................. 1318
48.2.5
LPUART Match Address Register (LPUARTx_MATCH).........................................................................1320
48.2.6
LPUART Modem IrDA Register (LPUARTx_MODIR).............................................................................1320
48.3 Functional description...................................................................................................................................................1322
48.3.1 Baud rate generation.................................................................................................................................... 1322
48.3.2 Transmitter functional description...............................................................................................................1323
48.3.3 Receiver functional description................................................................................................................... 1326
48.3.4 Additional LPUART functions.................................................................................................................... 1332
48.3.5 Infrared interface..........................................................................................................................................1334
48.3.6 Interrupts and status flags............................................................................................................................ 1335
Chapter 49
Integrated Interchip Sound (I2S) / Synchronous Audio Interface (SAI)
49.1 Introduction...................................................................................................................................................................1337
49.1.1 Features........................................................................................................................................................ 1337
49.1.2 Block diagram..............................................................................................................................................1337
49.1.3 Modes of operation...................................................................................................................................... 1338
49.2 External signals.............................................................................................................................................................1339
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 43