NXP Semiconductors K22F series User Manual

WDOG_STCTRLH field descriptions (continued)
Field Description
00 Byte 0 selected
01 Byte 1 selected
10 Byte 2 selected
11 Byte 3 selected
11
TESTSEL
Effective only if TESTWDOG is set. Selects the test to be run on the watchdog timer.
0 Quick test. The timer runs in normal operation. You can load a small time-out value to do a quick test.
1 Byte test. Puts the timer in the byte test mode where individual bytes of the timer are enabled for
operation and are compared for time-out against the corresponding byte of the programmed time-out
value. Select the byte through BYTESEL[1:0] for testing.
10
TESTWDOG
Puts the watchdog in the functional test mode. In this mode, the watchdog timer and the associated
compare and reset generation logic is tested for correct operation. The clock for the timer is switched from
the main watchdog clock to the fast clock input for watchdog functional test. The TESTSEL bit selects the
test to be run.
9
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
8
Reserved
This field is reserved.
7
WAITEN
Enables or disables WDOG in Wait mode.
0 WDOG is disabled in CPU Wait mode.
1 WDOG is enabled in CPU Wait mode.
6
STOPEN
Enables or disables WDOG in Stop mode.
0 WDOG is disabled in CPU Stop mode.
1 WDOG is enabled in CPU Stop mode.
5
DBGEN
Enables or disables WDOG in Debug mode.
0 WDOG is disabled in CPU Debug mode.
1 WDOG is enabled in CPU Debug mode.
4
ALLOWUPDATE
Enables updates to watchdog write-once registers, after the reset-triggered initial configuration window
(WCT) closes, through unlock sequence.
0 No further updates allowed to WDOG write-once registers.
1 WDOG write-once registers can be unlocked for updating.
3
WINEN
Enables Windowing mode.
0 Windowing mode is disabled.
1 Windowing mode is enabled.
2
IRQRSTEN
Used to enable the debug breadcrumbs feature. A change in this bit is updated immediately, as opposed
to updating after WCT.
0 WDOG time-out generates reset only.
1 WDOG time-out initially generates an interrupt. After WCT, it generates a reset.
1
CLKSRC
Selects clock source for the WDOG timer and other internal timing operations.
0 WDOG clock sourced from LPO .
1 WDOG clock sourced from alternate clock source.
Table continues on the next page...
Memory map and register definition
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
530 NXP Semiconductors

NXP Semiconductors K22F series Specifications

General

Brand	NXP Semiconductors
Model	K22F series
Category	Controller
Language	English