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NXP Semiconductors LPC1768 User Manual

NXP Semiconductors LPC1768
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UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 143 of 841
NXP Semiconductors
UM10360
Chapter 10: LPC176x/5x Ethernet
10.3 Features
• Ethernet standards support:
– Supports 10 or 100 Mbps PHY devices including 10 Base-T, 100 Base-TX,
100 Base-FX, and 100 Base-T4.
– Fully compliant with IEEE standard 802.3.
– Fully compliant with 802.3x Full Duplex Flow Control and Half Duplex back
pressure.
– Flexible transmit and receive frame options.
– VLAN frame support.
• Memory management:
– Independent transmit and receive buffers memory mapped to shared SRAM.
– DMA managers with scatter/gather DMA and arrays of frame descriptors.
– Memory traffic optimized by buffering and prefetching.
• Enhanced Ethernet features:
– Receive filtering.
– Multicast and broadcast frame support for both transmit and receive.
– Optional automatic FCS insertion (CRC) for transmit.
– Selectable automatic transmit frame padding.
Frame An Ethernet frame consists of destination address, source address, length
type field, payload and frame check sequence.
Half-word 16-bit entity
LAN Local Area Network
MAC Media Access Control sublayer
MII Media Independent Interface
MIIM MII management
Octet An 8-bit data entity, used in lieu of "byte" by IEEE 802.3
Packet A frame that is transported across Ethernet; a packet consists of a preamble,
a start of frame delimiter and an Ethernet frame.
PHY Ethernet Physical Layer
RMII Reduced MII
Rx Receive
TCP/IP Transmission Control Protocol / Internet Protocol. The most common
high-level protocol used with Ethernet.
Tx Transmit
VLAN Virtual LAN
WoL Wake-up on LAN
Word 32-bit entity
Table 124. Ethernet acronyms, abbreviations, and definitions …continued
Acronym or
Abbreviation
Definition

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NXP Semiconductors LPC1768 Specifications

General IconGeneral
BrandNXP Semiconductors
ModelLPC1768
CategoryMicrocontrollers
LanguageEnglish

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