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NXP Semiconductors LPC1768 - CBZ and CBNZ; Syntax; Operation; Restrictions

NXP Semiconductors LPC1768
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UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 709 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
34.2.9.2 CBZ and CBNZ
Compare and Branch on Zero, Compare and Branch on Non-Zero.
34.2.9.2.1 Syntax
CBZ Rn, label
CBNZ Rn, label
where:
Rn is the register holding the operand.
label is the branch destination.
34.2.9.2.2 Operation
Use the
CBZ
or
CBNZ
instructions to avoid changing the condition code flags and to reduce
the number of instructions.
CBZ Rn, label
does not change condition flags but is otherwise equivalent to:
CMP Rn, #0
BEQ label
CBNZ Rn, label
does not change condition flags but is otherwise equivalent to:
CMP Rn, #0
BNE label
34.2.9.2.3 Restrictions
The restrictions are:
Rn must be in the range of
R0
to
R7
the branch destination must be within 4 to 130 bytes after the instruction
these instructions must not be used inside an IT block.
34.2.9.2.4 Condition flags
These instructions do not change the flags.
34.2.9.2.5 Examples
CBZ R5, target ; Forward branch if R5 is zero
CBNZ R0, target ; Forward branch if R0 is not zero

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