UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 687 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
34.2.5.5 CMP and CMN
Compare and Compare Negative.
34.2.5.5.1 Syntax
CMP{cond} Rn, Operand2
CMN{cond} Rn, Operand2
where:
cond is an optional condition code, see Section 34.2.3.7
.
Rn is the register holding the first operand.
Operand2 is a flexible second operand. See Flexible second operand on page 3-10for
details of the options.
34.2.5.5.2 Operation
These instructions compare the value in a register with Operand2. They update the
condition flags on the result, but do not write the result to a register.
The
CMP
instruction subtracts the value of Operand2 from the value in Rn. This is the same
as a
SUBS
instruction, except that the result is discarded.
The
CMN
instruction adds the value of Operand2 to the value in Rn. This is the same as an
ADDS
instruction, except that the result is discarded.
34.2.5.5.3 Restrictions
In these instructions:
• do not use PC
• Operand2 must not be SP.
34.2.5.5.4 Condition flags
These instructions update the N, Z, C and V flags according to the result.
34.2.5.5.5 Examples
CMP R2, R9
CMN R0, #6400
CMPGT SP, R7, LSL #2
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