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NXP Semiconductors LPC1768 - Movt; Syntax; Operation; Restrictions

NXP Semiconductors LPC1768
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UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 690 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
34.2.5.7 MOVT
Move Top.
34.2.5.7.1 Syntax
MOVT{cond} Rd, #imm16
where:
cond is an optional condition code, see Section 34.2.3.7
.
Rd is the destination register.
imm16 is a 16-bit immediate constant.
34.2.5.7.2 Operation
MOVT
writes a 16-bit immediate value, imm16, to the top halfword, Rd[31:16], of its
destination register. The write does not affect Rd[15:0].
The
MOV
,
MOVT
instruction pair enables you to generate any 32-bit constant.
34.2.5.7.3 Restrictions
Rd must not be SP and must not be PC.
34.2.5.7.4 Condition flags
This instruction does not change the flags.
34.2.5.7.5 Examples
MOVT R3, #0xF123 ; Write 0xF123 to upper halfword of R3, lower halfword
; and APSR are unchanged

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