UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 744 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
Software must use a Load-Exclusive instruction with the corresponding Store-Exclusive
instruction.
To perform a guaranteed read-modify-write of a memory location, software must:
1. Use a Load-Exclusive instruction to read the value of the location.
2. Update the value, as required.
3. Use a Store-Exclusive instruction to attempt to write the new value back to the
memory location, and tests the returned status bit. If this bit is:
– 0: The read-modify-write completed successfully,
– 1: No write was performed. This indicates that the value returned at step 1 might
be out of date. The software must retry the read-modify-write sequence,
Software can use the synchronization primitives to implement a semaphores as follows:
1. Use a Load-Exclusive instruction to read from the semaphore address to check
whether the semaphore is free.
2. If the semaphore is free, use a Store-Exclusive to write the claim value to the
semaphore address.
3. If the returned status bit from step 2 indicates that the Store-Exclusive succeeded
then the software has claimed the semaphore. However, if the Store-Exclusive failed,
another process might have claimed the semaphore after the software performed
step 1.
The Cortex-M3 includes an exclusive access monitor, that tags the fact that the processor
has executed a Load-Exclusive instruction.
The processor removes its exclusive access tag if:
• It executes a
CLREX
instruction
• It executes a Store-Exclusive instruction, regardless of whether the write succeeds.
• An exception occurs. This means the processor can resolve semaphore conflicts
between different threads.
For more information about the synchronization primitive instructions, see
Section 34.2.4.8 “
LDREX and STREX” and Section 34.2.4.9.
34.3.2.8 Programming hints for the synchronization primitives
ANSI C cannot directly generate the exclusive access instructions. Some C compilers
provide intrinsic functions for generation of these instructions:
The actual exclusive access instruction generated depends on the data type of the pointer
passed to the intrinsic function. For example, the following C code generates the require
LDREXB
operation:
Table 638. C compiler intrinsic functions for exclusive access instructions
Instruction Intrinsic function
LDREX
,
LDREXH
, or
LDREXB unsigned int __ldrex(volatile void *ptr)
STREX
,
STREXH
, or
STREXB int __strex(unsigned int val, volatile void *ptr)
CLREX void __clrex(void)
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