UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 110 of 841
NXP Semiconductors
UM10360
Chapter 8: LPC176x/5x Pin connect block
[1] Not available on 80-pin package.
[2] Pins P0[27] and P0[28] are open-drain for I
2
C-bus compliance.
8.5.3 Pin Function Select register 2 (PINSEL2 - 0x4002 C008)
The PINSEL2 register controls the functions of the lower half of Port 1, which contains the
Ethernet related pins. The direction control bit in the FIO1DIR register is effective only
when the GPIO function is selected for a pin. For other functions, the direction is
controlled automatically.
8.5.4 Pin Function Select Register 3 (PINSEL3 - 0x4002 C00C)
The PINSEL3 register controls the functions of the upper half of Port 1. The direction
control bit in the FIO1DIR register is effective only when the GPIO function is selected for
a pin. For other functions, direction is controlled automatically.
25:24 P0.28
[1][2]
GPIO Port 0.28 SCL0 USB_SCL Reserved 00
27:26 P0.29 GPIO Port 0.29 USB_D
Reserved Reserved 00
29:28 P0.30 GPIO Port 0.30 USB_D
Reserved Reserved 00
31:30 - Reserved Reserved Reserved Reserved 00
Table 80. Pin function select register 1 (PINSEL1 - address 0x4002 C004) bit
description …continued
PINSEL1 Pin name Function when
00
Function
when 01
Function
when 10
Function
when 11
Reset
value
Table 81. Pin function select register 2 (PINSEL2 - address 0x4002 C008) bit description
PINSEL2 Pin
name
Function when
00
Function when
01
Function
when 10
Function
when 11
Reset
value
1:0 P1.0 GPIO Port 1.0 ENET_TXD0 Reserved Reserved 00
3:2 P1.1 GPIO Port 1.1 ENET_TXD1 Reserved Reserved 00
7:4 - Reserved Reserved Reserved Reserved 0
9:8 P1.4 GPIO Port 1.4 ENET_TX_EN Reserved Reserved 00
15:10 - Reserved Reserved Reserved Reserved 0
17:16 P1.8 GPIO Port 1.8 ENET_CRS Reserved Reserved 00
19:18 P1.9 GPIO Port 1.9 ENET_RXD0 Reserved Reserved 00
21:20 P1.10 GPIO Port 1.10 ENET_RXD1 Reserved Reserved 00
27:22 - Reserved Reserved Reserved Reserved 0
29:28 P1.14 GPIO Port 1.14 ENET_RX_ER Reserved Reserved 00
31:30 P1.15 GPIO Port 1.15 ENET_REF_CLK Reserved Reserved 00
Table 82. Pin function select register 3 (PINSEL3 - address 0x4002 C00C) bit
description
PINSEL3 Pin
name
Function when
00
Function when
01
Function
when 10
Function
when 11
Reset
value
1:0 P1.16
[1]
GPIO Port 1.16 ENET_MDC Reserved Reserved 00
3:2 P1.17
[1]
GPIO Port 1.17 ENET_MDIO Reserved Reserved 00
5:4 P1.18 GPIO Port 1.18 USB_UP_LED PWM1.1 CAP1.0 00
7:6 P1.19 GPIO Port 1.19 MCOA0 USB_PPWR
CAP1.1 00
9:8 P1.20 GPIO Port 1.20 MCI0 PWM1.2 SCK0 00
To Next Page
Loading...
