EasyManua.ls Logo

NXP Semiconductors LPC1768 - Operands; Restrictions When Using PC or SP; Flexible Second Operand; Constant

NXP Semiconductors LPC1768
841 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 653 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
Section 34.2.3.1 “Operands
Section 34.2.3.2 “Restrictions when using PC or SP
Section 34.2.3.3 “Flexible second operand
Section 34.2.3.4 “Shift Operations
Section 34.2.3.5 “Address alignment
Section 34.2.3.6 “PC-relative expressions
Section 34.2.3.7 “Conditional execution
Section 34.2.3.8 “Instruction width selection.
34.2.3.1 Operands
An instruction operand can be an ARM register, a constant, or another instruction-specific
parameter. Instructions act on the operands and often store the result in a destination
register. When there is a destination register in the instruction, it is usually specified before
the operands.
Operands in some instructions are flexible in that they can either be a register or a
constant. See Section 34.2.3.3
.
34.2.3.2 Restrictions when using PC or SP
Many instructions have restrictions on whether you can use the Program Counter (PC)
or Stack Pointer (SP) for the operands or destination register. See instruction
descriptions for more information.
Remark: Bit[0] of any address you write to the PC with a
BX
,
BLX
,
LDM
,
LDR
, or
POP
instruction
must be 1 for correct execution, because this bit indicates the required instruction set, and
the Cortex-M3 processor only supports Thumb instructions.
34.2.3.3 Flexible second operand
Many general data processing instructions have a flexible second operand. This is shown
as Operand2 in the descriptions of the syntax of each instruction.
Operand2 can be a:
Section 34.2.3.3.1 “Constant
Section 34.2.3.3.2 “Register with optional shift
34.2.3.3.1 Constant
You specify an Operand2 constant in the form:
#
constant
where
constant
can be:
any constant that can be produced by shifting an 8-bit value left by any number of bits
within a 32-bit word
any constant of the form
0x00XY00XY
any constant of the form
0xXY00XY00
any constant of the form
0xXYXYXYXY
.

Table of Contents

Other manuals for NXP Semiconductors LPC1768

Related product manuals