NXP Semiconductors LPC1768 User Manual

UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 656 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
• If n is 33 or more and the carry flag is updated, it is updated to 0.
34.2.3.4.3 LSL
Logical shift left by n bits moves the right-hand
32 -n bits of the register Rm, to the left by n
places, into the left-hand
32 -n bits of the result. And it sets the right-hand n bits of the
result to 0. See Figure 143
.
You can use he LSL #n operation to multiply the value in the register Rm by 2
n
, if the value
is regarded as an unsigned integer or a two’s complement signed integer. Overflow can
occur without warning.
When the instruction is
LSLS or when LSL #n, with non-zero n, is used in Operand2 with
the instructions
MOVS , MVNS , ANDS , ORRS , ORNS , EORS , BICS , TEQ or TST , the carry flag is updated
to the last bit shifted out, bit[
32 -n], of the register Rm. These instructions do not affect the
carry flag when used with LSL #0.
Note
• If n is 32 or more, then all the bits in the result are cleared to 0.
• If n is 33 or more and the carry flag is updated, it is updated to 0.
34.2.3.4.4 ROR
Rotate right by n bits moves the left-hand
32 -n bits of the register Rm, to the right by n
places, into the right-hand
32 -n bits of the result. And it moves the right-hand n bits of the
register into the left-hand n bits of the result. See Figure 144
.
When the instruction is
RORS or when ROR #n is used in Operand2 with the instructions
MOVS , MVNS , ANDS , ORRS , ORNS , EORS , BICS , TEQ or TST , the carry flag is updated to the last bit
rotation, bit[n-1], of the register Rm.
Note
Fig 142. LSR#3
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Fig 143. LSL#3
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NXP Semiconductors LPC1768 Specifications

General

Brand	NXP Semiconductors
Model	LPC1768
Category	Microcontrollers
Language	English