UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 253 of 841
NXP Semiconductors
UM10360
Chapter 11: LPC176x/5x USB device controller
the SETUP data. If it is set then it should discard the previously read data, clear the PO bit
by issuing a Select Endpoint/Clear Interrupt command, read the new SETUP data and
again check the status of the PO bit.
See Section 11.14 “
Slave mode operation” for a description of when this command is
used.
11.12.14 Validate Buffer (Command: 0xFA, Data: none)
When the CPU has written data into an IN buffer, software should issue a Validate Buffer
command. This tells hardware that the buffer is ready for sending on the USB bus.
Hardware will send the contents of the buffer when the next IN token packet is received.
Internally, there is a hardware FIFO status flag called Buffer_Full. This flag is set by the
Validate Buffer command and cleared when the data has been sent on the USB bus and
the buffer is empty.
A control IN buffer cannot be validated when its corresponding OUT buffer has the Packet
Over-written (PO) bit (see the Clear Buffer Register) set or contains a pending SETUP
packet. For the control endpoint the validated buffer will be invalidated when a SETUP
packet is received.
See Section 11.14 “
Slave mode operation” for a description of when this command is
used.
11.13 USB device controller initialization
The LPC176x/5x USB device controller initialization includes the following steps:
1. Enable the device controller by setting the PCUSB bit of PCONP.
2. Configure and enable the PLL and Clock Dividers to provide 48 MHz for usbclk and
the desired frequency for cclk. For the procedure for determining the PLL setting and
configuration, see Section 4.5.11 “
Procedure for determining PLL0 settings”.
3. Enable the device controller clocks by setting DEV_CLK_EN and AHB_CLK_EN bits
in the USBClkCtrl register. Poll the respective clock bits in the USBClkSt register until
they are set.
4. Enable the USB pin functions by writing to the corresponding PINSEL register.
5. Disable the pull-ups and pull-downs on the V
BUS
pin using the corresponding
PINMODE register by putting the pin in the “pin has neither pull-up nor pull-down
resistor enabled” mode. See Section 8.4 “
Pin mode select register values”.
6. Set USBEpIn and USBMaxPSize registers for EP0 and EP1, and wait until the
EP_RLZED bit in USBDevIntSt is set so that EP0 and EP1 are realized.
Table 250. Clear Buffer command bit description
Bit Symbol Value Description Reset value
0 PO Packet over-written bit. This bit is only applicable to the control endpoint EP0. 0
0 The previously received packet is intact.
1 The previously received packet was over-written by a later SETUP packet.
7:1 - - Reserved, user software should not write ones to reserved bits. The value read from
a reserved bit is not defined.
NA
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