NXP Semiconductors LPC1768 - Memory Model; Memory Regions, Types and Attributes

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User manual Rev. 3 — 20 December 2013 737 of 841
NXP Semiconductors
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Chapter 34: Appendix: Cortex-M3 user guide
34.3.2 Memory model
This section describes the processor memory map, the behavior of memory accesses,
and the bit-banding features. The processor has a fixed memory map that provides up to
4GB of addressable memory. The memory map is:
The regions for SRAM and peripherals include bit-band regions. Bit-banding provides
atomic operations to bit data, see Section 34.3.2.5
.
The processor reserves regions of the Private peripheral bus (PPB) address range for
core peripheral registers, see Section 34.4.1 “
About the Cortex-M3 peripherals”.
34.3.2.1 Memory regions, types and attributes
The memory map and the programming of the MPU split the memory map into regions.
Each region has a defined memory type, and some regions have additional memory
attributes. The memory type and attributes determine the behavior of accesses to the
region.
The memory types are:
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