NXP Semiconductors LPC1768 User Manual

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User manual Rev. 3 — 19 December 2013 242 of 841
NXP Semiconductors
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Chapter 11: LPC176x/5x USB device controller
11.10.7.16 USB System Error Interrupt Status register (USBSysErrIntSt - 0x5000 C2B8)
If a system error (AHB bus error) occurs when transferring the data or when fetching or
updating the DD the corresponding bit is set in this register. USBSysErrIntSt is a read-only
register.
11.10.7.17 USB System Error Interrupt Clear register (USBSysErrIntClr - 0x5000 C2BC)
Writing one to a bit in this register clears the corresponding bit in the USBSysErrIntSt
register. Writing zero has no effect. USBSysErrIntClr is a write-only register.
11.10.7.18 USB System Error Interrupt Set register (USBSysErrIntSet - 0x5000 C2C0)
Writing one to a bit in this register sets the corresponding bit in the USBSysErrIntSt
register. Writing zero has no effect. USBSysErrIntSet is a write-only register.
11.11 Interrupt handling
This section describes how an interrupt event on any of the endpoints is routed to the
Nested Vectored Interrupt Controller (NVIC). For a diagram showing interrupt event
handling, see Figure 29
.
All non-isochronous OUT endpoints (control, bulk, and interrupt endpoints) generate an
interrupt when they receive a packet without an error. All non-isochronous IN endpoints
generate an interrupt when a packet has been successfully transmitted or when a NAK
signal is sent and interrupts on NAK are enabled by the SIE Set Mode command, see
Section 11.12.3
. For isochronous endpoints, a frame interrupt is generated every 1 ms.
Table 237. USB New DD Request Interrupt Set register (USBNDDRIntSet - address 0x5000 C2B4) bit description
Bit Symbol Value Description Reset value
31:0 EPxx Set endpoint xx (2 xx 31) new DD interrupt request. 0
0No effect.
1 Set the EPxx new DD interrupt request in the USBNDDRIntSt register.
Table 238. USB System Error Interrupt Status register (USBSysErrIntSt - address 0x5000 C2B8) bit description
Bit Symbol Value Description Reset value
31:0 EPxx Endpoint xx (2 xx 31) System Error Interrupt request. 0
0 There is no System Error Interrupt request for endpoint xx.
1 There is a System Error Interrupt request for endpoint xx.
Table 239. USB System Error Interrupt Clear register (USBSysErrIntClr - address 0x5000 C2BC) bit description
Bit Symbol Value Description Reset value
31:0 EPxx Clear endpoint xx (2 xx 31) System Error Interrupt request. 0
0 No effect.
1 Clear the EPxx System Error Interrupt request in the USBSysErrIntSt register.
Table 240. USB System Error Interrupt Set register (USBSysErrIntSet - address 0x5000 C2C0) bit description
Bit Symbol Value Description Reset value
31:0 EPxx Set endpoint xx (2 xx 31) System Error Interrupt request. 0
0 No effect.
1 Set the EPxx System Error Interrupt request in the USBSysErrIntSt register.

NXP Semiconductors LPC1768 Specifications

General

Brand	NXP Semiconductors
Model	LPC1768
Category	Microcontrollers
Language	English