UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 698 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
34.2.6.3 SDIV and UDIV
Signed Divide and Unsigned Divide.
34.2.6.3.1 Syntax
SDIV{cond} {Rd,} Rn, Rm
UDIV{cond} {Rd,} Rn, Rm
where:
cond is an optional condition code, see Section 34.2.3.7 “
Conditional execution”.
Rd is the destination register. If Rd is omitted, the destination register is Rn.
Rn is the register holding the value to be divided.
Rm is a register holding the divisor.
34.2.6.3.2 Operation
SDIV
performs a signed integer division of the value in Rn by the value in Rm.
UDIV
performs an unsigned integer division of the value in Rn by the value in Rm.
For both instructions, if the value in Rn is not divisible by the value in Rm, the result is
rounded towards zero.
34.2.6.3.3 Restrictions
Do not use SP and do not use PC.
34.2.6.3.4 Condition flags
These instructions do not change the flags.
34.2.6.3.5 Examples
SDIV R0, R2, R4 ; Signed divide, R0 = R2/R4
UDIV R8, R8, R1 ; Unsigned divide, R8 = R8/R1
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