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NXP Semiconductors LPC1768 - Flash Signature Generation; Register Description for Signature Generation

NXP Semiconductors LPC1768
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UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 639 of 841
NXP Semiconductors
UM10360
Chapter 32: LPC176x/5x Flash memory interface and programming
32.10 Flash signature generation
The flash module contains a built-in signature generator. This generator can produce a
128-bit signature from a range of flash memory. A typical usage is to verify the flashed
contents against a calculated signature (e.g. during programming).
The address range for generating a signature must be aligned on flash-word boundaries,
i.e. 128-bit boundaries. Once started, signature generation completes independently.
While signature generation is in progress, the flash memory cannot be accessed for other
purposes, and an attempted read will cause a wait state to be asserted until signature
generation is complete. Code outside of the flash (e.g. internal RAM) can be executed
during signature generation. This can include interrupt services, if the interrupt vector
table is re-mapped to memory other than the flash memory. The code that initiates
signature generation should also be placed outside of the flash memory.
32.10.1 Register description for signature generation
Table 599. Register overview: FMC (base address 0x4008 4000)
Name Description Access Reset
Value
Address Reference
FMSSTART Signature start address register R/W 0 0x4008 4020 Table 600
FMSSTOP Signature stop-address register R/W 0 0x4008 4024 Table 601
FMSW0 128-bit signature Word 0 R - 0x4008 402C Table 602
FMSW1 128-bit signature Word 1 R - 0x4008 4030 Table 603
FMSW2 128-bit signature Word 2 R - 0x4008 4034 Table 604
FMSW3 128-bit signature Word 3 R - 0x4008 4038 Table 605
FMSTAT Signature generation status register R 0 0x4008 4FE0 Section 32.10.1.3
FMSTATCLR Signature generation status clear register W - 0x4008 4FE8 Section 32.10.1.4

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