UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 641 of 841
NXP Semiconductors
UM10360
Chapter 32: LPC176x/5x Flash memory interface and programming
32.10.1.3 Flash Module Status register (FMSTAT - 0x0x4008 4FE0)
The read-only FMSTAT register provides a means of determining when signature
generation has completed. Completion of signature generation can be checked by polling
the SIG_DONE bit in FMSTAT. SIG_DONE should be cleared via the FMSTATCLR
register before starting a signature generation operation, otherwise the status might
indicate completion of a previous operation.
32.10.1.4 Flash Module Status Clear register (FMSTATCLR - 0x0x4008 4FE8)
The FMSTATCLR register is used to clear the signature generation completion flag.
Table 604. FMSW2 register bit description (FMSW2, address: 0x4008 4034)
Bit Symbol Description Reset Value
31:0 SW2[95:64] Word 2 of 128-bit signature (bits 95 to 64). -
Table 605. FMSW3 register bit description (FMSW3, address: 0x4008 4038)
Bit Symbol Description Reset Value
31:0 SW3[127:96] Word 3 of 128-bit signature (bits 127 to 96). -
Table 606. Flash module Status register (FMSTAT - 0x4008 4FE0) bit description
Bit Symbol Description Reset Value
31:2 - Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
NA
2 SIG_DONE When 1, a previously started signature generation has completed. See
FMSTATCLR register description for clearing this flag.
0
1:0 - Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
NA
Table 607. Flash Module Status Clear register (FMSTATCLR - 0x0x4008 4FE8) bit description
Bit Symbol Description Reset Value
31:2 - Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
NA
2 SIG_DONE_CLR Writing a 1 to this bits clears the signature generation completion flag
(SIG_DONE) in the FMSTAT register.
0
1:0 - Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
NA