UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 674 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
34.2.4.7 PUSH and POP
Push registers onto, and pop registers off a full-descending stack.
34.2.4.7.1 Syntax
PUSH
{cond} reglist
POP
{cond} reglist
where:
cond is an optional condition code, see Section 34.2.3.7 “
Conditional execution”.
reglist is a non-empty list of registers, enclosed in braces. It can contain register ranges. It
must be comma separated if it contains more than one register or register range.
PUSH
and
POP
are synonyms for
STMDB
and
LDM
(or
LDMIA
) with the memory addresses for the
access based on SP, and with the final address for the access written back to the SP.
PUSH
and
POP
are the preferred mnemonics in these cases.
34.2.4.7.2 Operation
PUSH
stores registers on the stack in order of decreasing the register numbers, with the
highest numbered register using the highest memory address and the lowest numbered
register using the lowest memory address.
POP
loads registers from the stack in order of increasing register numbers, with the lowest
numbered register using the lowest memory address and the highest numbered register
using the highest memory address.
See Section 34.2.4.6
for more information.
34.2.4.7.3 Restrictions
In these instructions:
• reglist must not contain SP
• for the
PUSH
instruction, reglist must not contain PC
• for the
POP
instruction, reglist must not contain PC if it contains LR.
When PC is in reglist in a
POP
instruction:
• bit[0] of the value loaded to the PC must be 1 for correct execution, and a branch
occurs to this halfword-aligned address
• if the instruction is conditional, it must be the last instruction in the IT block.
34.2.4.7.4 Condition flags
These instructions do not change the flags.
34.2.4.7.5 Examples
PUSH {R0,R4-R7}
PUSH {R2,LR}
POP {R0,R10,PC}
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