UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 711 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
•
CPSID
and
CPSIE.
Other restrictions when using an IT block are:
• a branch or any instruction that modifies the PC must either be outside an IT block or
must be the last instruction inside the IT block. These are:
–
ADD PC, PC, Rm
–
MOV PC, Rm
–
B
,
BL
,
BX
,
BLX
– any
LDM
,
LDR
, or
POP
instruction that writes to the PC
–
TBB
and
TBH
• do not branch to any instruction inside an IT block, except when returning from an
exception handler
• all conditional instructions except Bcond must be inside an IT block. Bcond can be
either outside or inside an IT block but has a larger branch range if it is inside one
• each instruction inside the IT block must specify a condition code suffix that is either
the same or logical inverse as for the other instructions in the block.
Remark: Your assembler might place extra restrictions on the use of IT blocks, such as
prohibiting the use of assembler directives within them.
34.2.9.3.4 Condition flags
This instruction does not change the flags.
34.2.9.3.5 Example
ITTE NE ; Next 3 instructions are conditional
ANDNE R0, R0, R1 ; ANDNE does not update condition flags
ADDSNE R2, R2, #1 ; ADDSNE updates condition flags
MOVEQ R2, R3 ; Conditional move
CMP R0, #9 ; Convert R0 hex value (0 to 15) into ASCII
; ('0'-'9', 'A'-'F')
ITE GT ; Next 2 instructions are conditional
ADDGT R1, R0, #55 ; Convert 0xA -> 'A'
ADDLE R1, R0, #48 ; Convert 0x0 -> '0'
IT GT ; IT block with only one conditional instruction
ADDGT R1, R1, #1 ; Increment R1 conditionally
ITTEE EQ ; Next 4 instructions are conditional
MOVEQ R0, R1 ; Conditional move
ADDEQ R2, R2, #10 ; Conditional add
ANDNE R3, R3, #1 ; Conditional AND
BNE.W dloop ; Branch instruction can only be used in the last
; instruction of an IT block
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