UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 584 of 841
NXP Semiconductors
UM10360
Chapter 30: LPC176x/5x Digital-to-Analog Converter (DAC)
30.4 Register description
The DAC registers are shown in Table 538. Note that the DAC does not have a control bit
in the PCONP register. To enable the DAC, its output must be selected to appear on the
related pin, P0.26, by configuring the PINSEL1 register. See Section 8.5.2 “
Pin Function
Select Register 1 (PINSEL1 - 0x4002 C004)”. the DAC must be enabled in this manner
prior to accessing any DAC registers.
[1] Reset value reflects the data stored in used bits only. It does not include reserved bits content.
30.4.1 D/A Converter Register (DACR - 0x4008 C000)
This read/write register includes the digital value to be converted to analog, and a bit that
trades off performance vs. power. Bits 5:0 are reserved for future, higher-resolution D/A
converters.
[1] The settling times noted in the description of the BIAS bit are valid for a capacitance load on the AOUT pin
not exceeding 100 pF. A load impedance value greater than that value will cause settling time longer than
the specified time. One or more graph(s) of load impedance vs. settling time will be included in the final data
sheet.
30.4.2 D/A Converter Control register (DACCTRL - 0x4008 C004)
This read/write register enables the DMA operation and controls the DMA timer.
Table 538. DAC registers
Name Description Access Reset
value
[1]
Address
DACR D/A Converter Register. This register contains the digital value to be
converted to analog and a power control bit.
R/W 0 0x4008 C000
DACCTRL DAC Control register. This register controls DMA and timer operation. R/W 0 0x4008 C004
DACCNTVAL DAC Counter Value register. This register contains the reload value for
the DAC DMA/Interrupt timer.
R/W 0 0x4008 C008
Table 539: D/A Converter Register (DACR - address 0x4008 C000) bit description
Bit Symbol Value Description Reset
Value
5:0 - Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
NA
15:6 VALUE After the selected settling time after this field is written with a new VALUE, the voltage on
the AOUT pin (with respect to V
SSA
) is VALUE ((V
REFP
- V
REFN
)/1024) + V
REFN
.
0
16 BIAS
[1]
0 The settling time of the DAC is 1 s max, and the maximum current is 700 A. This allows
a maximum update rate of 1 MHz.
0
1 The settling time of the DAC is 2.5
s and the maximum current is 350 A. This allows a
maximum update rate of 400 kHz.
31:17 - Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
NA
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