UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 707 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
34.2.9.1 B, BL, BX, and BLX
Branch instructions.
34.2.9.1.1 Syntax
B{cond} label
BL{cond} label
BX{cond} Rm
BLX{cond} Rm
where:
B is branch (immediate).
BL is branch with link (immediate).
BX is branch indirect (register).
BLX is branch indirect with link (register).
cond is an optional condition code, see Section 34.2.3.7 “
Conditional execution”.
label is a PC-relative expression. See Section 34.2.3.6 “
PC-relative expressions”.
Rm is a register that indicates an address to branch to. Bit[0] of the value in Rm must be
1, but the address to branch to is created by changing bit[0] to 0.
34.2.9.1.2 Operation
All these instructions cause a branch to label, or to the address indicated in Rm. In
addition:
• The
BL
and
BLX
instructions write the address of the next instruction to LR (the link
register, R14).
• The
BX
and
BLX
instructions cause a UsageFault exception if bit[0] of Rm is 0.
Bcond label is the only conditional instruction that can be either inside or outside an IT
block. All other branch instructions must be conditional inside an IT block, and must be
unconditional outside the IT block, see Section 34.2.9.3
.
Table 623
shows the ranges for the various branch instructions.
Remark: You might have to use the .W suffix to get the maximum branch range. See
Section 34.2.3.8 “
Instruction width selection”.
Table 623. Branch ranges
Instruction Branch range
B label
16 MB to +16 MB
B
cond
label
(outside IT block) 1 MB to +1 MB
B
cond
label
(inside IT block) 16 MB to +16 MB
BL
{cond}
label
16 MB to +16 MB
BX
{cond}
Rm
Any value in register
BLX
{cond}
Rm
Any value in register
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