UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 22 of 841
NXP Semiconductors
UM10360
Chapter 3: LPC176x/5x System control
3.4.1 Reset Source Identification Register (RSID - 0x400F C180)
This register contains one bit for each source of Reset. Writing a 1 to any of these bits
clears the corresponding read-side bit to 0. The interactions among the four sources are
described below.
Table 8. Reset Source Identification register (RSID - address 0x400F C180) bit description
Bit Symbol Description Reset
value
0 POR Assertion of the POR signal sets this bit, and clears all of the other bits in
this register. But if another Reset signal (e.g., External Reset) remains
asserted after the POR signal is negated, then its bit is set. This bit is not
affected by any of the other sources of Reset.
See
text
1 EXTR Assertion of the RESET
signal sets this bit. This bit is cleared only by
software or POR.
See
text
2 WDTR This bit is set when the Watchdog Timer times out and the WDTRESET bit
in the Watchdog Mode Register is 1. This bit is cleared only by software or
POR.
See
text
3 BODR This bit is set when the V
DD(REG)(3V3)
voltage reaches a level below the
BOD reset trip level (typically 1.85 V under nominal room temperature
conditions).
If the V
DD(REG)(3V3)
voltage dips from the normal operating range to below
the BOD reset trip level and recovers, the BODR bit will be set to 1.
If the V
DD(REG)(3V3)
voltage dips from the normal operating range to below
the BOD reset trip level and continues to decline to the level at which POR
is asserted (nominally 1 V), the BODR bit is cleared.
If the V
DD(REG)(3V3)
voltage rises continuously from below 1 V to a level
above the BOD reset trip level, the BODR will be set to 1.
This bit is cleared only by software or POR.
Note: Only in the case where a reset occurs and the POR = 0, the BODR
bit indicates if the V
DD(REG)(3V3)
voltage was below the BOD reset trip level
or not.
See
text
31:4 - Reserved, user software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
NA
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