NXP Semiconductors LPC1768 - Vector Table; Exception Priorities

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User manual Rev. 3 — 20 December 2013 749 of 841
NXP Semiconductors
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Chapter 34: Appendix: Cortex-M3 user guide
34.3.3.4 Vector table
The vector table contains the reset value of the stack pointer, and the start addresses,
also called exception vectors, for all exception handlers. Figure 148
shows the order of
the exception vectors in the vector table. The least-significant bit of each vector must be 1,
indicating that the exception handler is Thumb code. Note that the upper limit of the IRQ
number is device dependent.
On system reset, the vector table is fixed at address 0x00000000 . Privileged software can
write to the VTOR to relocate the vector table start address to a different memory location,
in the range
0x00000080 to 0x3FFFFF80 , see Section 34.4.3.5 “Vector Table Offset Register”.
34.3.3.5 Exception priorities
As Table 639 shows, all exceptions have an associated priority, with:
• a lower priority value indicating a higher priority
• configurable priorities for all exceptions except Reset, Hard fault, and NMI.
If software does not configure any priorities, then all exceptions with a configurable priority
have a priority of 0. For information about configuring exception priorities see
Fig 148. Vector table
Exception
number
IRQ
number Offset Vector
0x1FC
.
.
.
0x004C
0x0048
0x0044
0x0040
0x003C
0x0038
0x002C
0x0018
0x0014
0x0010
0x000C
0x0008
0x0004
0x0000
IRQ111
.
.
.
IRQ2
IRQ1
IRQ0
Systick
PendSV
Reserved
Reserved for debug
SVCall
Usage fault
Bus fault
Memory management fault
Hard fault
NMI
Reset
Initial SP value.
111
2
1
0
-1
-2
-5
-10
-11
-12
-13
-14
127
.
.
.
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Reserved