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NXP Semiconductors LPC1768 - S Operating Modes

NXP Semiconductors LPC1768
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UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 19 December 2013 485 of 841
NXP Semiconductors
UM10360
Chapter 20: LPC176x/5x I2S
20.7 I
2
S operating modes
The clocking and WS usage of the I
2
S interface is configurable. In addition to master and
slave modes, which are independently configurable for the transmitter and the receiver,
several different clock sources are possible, including variations that share the clock
and/or WS between the transmitter and receiver. This last option allows using I
2
S with
fewer pins, typically four.
Many configurations are possible that are not considered useful, the following tables and
figures give details of the configurations that are most likely to be useful.
Table 419: I
2
S transmit modes
I2SDAO
[5]
I2STXMODE
[3:0]
Description
0 0 0 0 0 Typical transmitter master mode. See Figure 101.
The
I
2
S transmit function operates as a master.
The transmit clock source is the fractional rate divider.
The WS used is the internally generated TX_WS.
The TX_MCLK pin is not enabled for output.
0 0 0 1 0 Transmitter master mode sharing the receiver reference clock. See Figure 102
.
The
I
2
S transmit function operates as a master.
The transmit clock source is RX_REF.
The WS used is the internally generated TX_WS.
The TX_MCLK pin is not enabled for output.
0 0 1 0 0 4-wire transmitter master mode sharing the receiver bit clock and WS. See Figure 103
.
The
I
2
S transmit function operates as a master.
The transmit clock source is the RX bit clock.
The WS used is the internally generated RX_WS.
The TX_MCLK pin is not enabled for output.
0 1 0 0 0 Transmitter master mode with TX_MCLK output. See Figure 101
.
The
I
2
S transmit function operates as a master.
The transmit clock source is the fractional rate divider.
The WS used is the internally generated TX_WS.
The TX_MCLK pin is enabled for output.
1 0 0 0 0 Typical transmitter slave mode. See Figure 104
.
The
I
2
S transmit function operates as a slave.
The transmit clock source is the TX_CLK pin.
The WS used is the TX_WS pin.
1 0 0 1 0 Transmitter slave mode sharing the receiver reference clock. See Figure 105
.
The
I
2
S transmit function operates as a slave.
The transmit clock source is RX_REF.
The WS used is the TX_WS pin.
1 0 1 0 0 4-wire transmitter slave mode sharing the receiver bit clock and WS. See Figure 106
.
The
I
2
S transmit function operates as a slave.
The transmit clock source is the RX bit clock.
The WS used is RX_WS ref.

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