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NXP Semiconductors LPC1768 - Condition Flags; Examples

NXP Semiconductors LPC1768
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UM10360 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
User manual Rev. 3 — 20 December 2013 676 of 841
NXP Semiconductors
UM10360
Chapter 34: Appendix: Cortex-M3 user guide
do not use PC
do not use SP for Rd and Rt
for
STREX
, Rd must be different from both Rt and Rn
the value of offset must be a multiple of four in the range 0-1020.
34.2.4.8.4 Condition flags
These instructions do not change the flags.
34.2.4.8.5 Examples
MOV R1, #0x1 ; Initialize the ‘lock taken’ value
try
LDREX R0, [LockAddr] ; Load the lock value
CMP R0, #0 ; Is the lock free?
ITT EQ ; IT instruction for STREXEQ and CMPEQ
STREXEQ R0, R1, [LockAddr] ; Try and claim the lock
CMPEQ R0, #0 ; Did this succeed?
BNE try ; No – try again
.... ; Yes – we have the lock

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